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Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M (Preliminary) -- High Speed 10MBit/s Logic Gate Optocouplers
February 2010
Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M (Preliminary) High Speed 10MBit/s Logic Gate Optocouplers
Features

Description
The 6N137M, HCPL2601M, HCPL2611M single-channel and HCPL2630M, HCPL2631M dual-channel optocouplers consist of a 850 nm AlGaAS LED, optically coupled to a very high speed integrated photo-detector logic gate with a strobable output. This output features an open collector, thereby permitting wired OR outputs. The switching parameters are guaranteed over the temperature range of -40C to +85C. A maximum input signal of 5mA will provide a minimum output sink current of 13mA (fan out of 8). An internal noise shield provides superior common mode rejection of typically 10kV/s. The HCPL2601M and HCPL2631M has a minimum CMR of 5kV/s. The HCPL2611M has a minimum CMR of 10kV/s.
Very high speed - 10 MBit/s Superior CMR - 10 kV/s Fan-out of 8 over -40C to +85C Logic gate output Strobable output Wired OR-open collector U.L. recognized (File # E90700, Vol. 2)
Applications

Ground loop elimination LSTTL to TTL, LSTTL or 5-volt CMOS Line receiver, data transmission Data multiplexing Switching power supplies Pulse transformer replacement Computer-peripheral interface
Schematics
Package Outlines
N/C 1
8 VCC
8
+1 VF1
8 VCC
1
8 1
+2 VF _ 3
7 VE
_2
7 V01
8
6 VO
_ V
3
6 V02
8 1 1
F2
N/C 4
5 GND
+4
5 GND
Truth Table (Positive Logic)
Input Enable
H H L L NC NC
Output
L H H H L H
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6N137M HCPL2601M HCPL2611M
H
HCPL2630M HCPL2631M (Preliminary)
L H L H L
A 0.1F bypass capacitor must be connected between pins 8 and 5(1).
(c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL2601M, HCPL2611M, HCPL2630M, HCPL2631M Rev. 1.0.3
Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M (Preliminary) -- High Speed 10MBit/s Logic Gate Optocouplers
Absolute Maximum Ratings (TA = 25C unless otherwise specified) Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Symbol
TSTG TOPR TSOL EMITTER IF VE VR PI DETECTOR Supply Voltage VCC (1 minute max) IO VO PO Output Current Output Voltage Collector Output Power Dissipation Single Channel Dual Channel (Each Channel) Each Channel Single Channel Dual Channel (Each Channel) 7.0 50 50 7.0 85 60 V mW V mA DC/Average Forward Input Current Enable Input Voltage Not to Exceed VCC by more than 500mV Reverse Input Voltage Power Dissipation Single Channel Dual Channel (Each Channel) Single Channel Each Channel Single Channel Dual Channel (Each Channel) 50 30 5.5 5.0 100 45 V V mW mA Storage Temperature Operating Temperature Lead Solder Temperature
Parameter
Value
-40 to +125 -40 to +100 260 for 10 sec
Units
C C C
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.
Symbol
IFL IFH VCC VEL VEH TA N
Parameter
Input Current, Low Level Input Current, High Level Supply Voltage, Output Enable Voltage, Low Level Enable Voltage, High Level Low Level Supply Current Fan Out (TTL load)
Min.
0 *6.3 4.5 0 2.0 -40
Max.
250 15 5.5 0.8 VCC +85 8
Units
A mA V V V C
*6.3mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0mA or less.
(c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL2601M, HCPL2611M, HCPL2630M, HCPL2631M Rev. 1.0.3
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Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M (Preliminary) -- High Speed 10MBit/s Logic Gate Optocouplers
Electrical Characteristics (TA = 0 to 70C unless otherwise specified)
Individual Component Characteristics Symbol
EMITTER VF BVR CIN VF / TA DETECTOR ICCH ICCL High Level Supply Current Low Level Supply Current VCC = 5.5V, IF = 0mA, VE = 0.5V Single Channel Dual Channel IEL IEH VEH VEL Low Level Enable Current High Level Enable Current High Level Enable Voltage Low Level Enable Voltage VCC = 5.5V, VE = 0.5V VCC = 5.5V, VE = 2.0V VCC = 5.5V, IF = 10mA VCC = 5.5V, IF = 10mA
(3)
Parameter
Input Forward Voltage Input Reverse Breakdown Voltage Input Capacitance Input Diode Temperature Coefficient IF = 10mA
Test Conditions
Min.
Typ.*
Max.
1.8
Unit
V V
TA = 25C IR = 10A VF = 0, f = 1MHz IF = 10mA 5.0
1.4
1.75
60 -1.4
pF mV/C
Single Channel Dual Channel VCC = 5.5V, IF = 10mA VE = 0.5V
6 10 8 14 -0.7 -0.5 2.0
10 15 13 21 -1.6 -1.6 0.8
mA mA
mA mA V V
Switching Characteristics (TA = -40C to +85C, VCC = 5V, IF = 7.5mA unless otherwise specified)
Symbol
TPLH
AC Characteristics
Propagation Delay Time to Output HIGH Level Propagation Delay Time to Output LOW Level Output Rise Time (10-90%) Output Rise Time (90-10%) Enable Propagation Delay Time to Output HIGH Level Enable Propagation Delay Time to Output LOW Level Common Mode Transient Immunity (at Output HIGH Level)
Test Conditions
RL = 350, CL = 15pF(4) (Fig. 12) TA = 25C(5) RL = 350, CL = 15pF (Fig. 12) (RL = 350, CL = 15pF (Fig. 12) RL = 350, CL = 15pF
(6)
Min.
20
Typ.*
40
Max. Unit
75 100 ns
TA = 25C
TPHL
25
40
75 100
ns
|TPHL-TPLH| Pulse Width Distortion tr tf tELH
1 30 10 15
35
ns ns ns ns
(Fig. 12)
RL = 350, CL = 15pF(7) (Fig. 12) IF = 7.5mA, VEH = 3.5V, RL = 350, CL = 15pF(8) (Fig. 13) IF = 7.5mA, VEH = 3.5V, RL = 350, CL = 15pF(9) (Fig. 13) TA = 25C, |VCM| = 50V 6N137M, HCPL2630M (Peak), IF = 0mA, HCPL2601M, VOH (Min.) = 2.0V, HCPL2631M RL = 350(10) (Fig. 14) |VCM| = 400V HCPL2611M
tEHL
15
ns
|CMH|
10,000 5000 10,000
V/s
10,000 5000 10,000
15,000 10,000 10,000 15,000
V/s
|CML|
Common Mode Transient Immunity (at Output LOW Level)
RL = 350, IF = 7.5mA, 6N137M, HCPL2630M VOL (Max.) = 0.8V, HCPL2601M, TA = 25C(11) (Fig. 14) HCPL2631M |VCM| = 400V HCPL2611M
(c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL2601M, HCPL2611M, HCPL2630M, HCPL2631M Rev. 1.0.3
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Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M (Preliminary) -- High Speed 10MBit/s Logic Gate Optocouplers
Electrical Characteristics (Continued)
Transfer Characteristics (TA = -40 to +85C unless otherwise specified) Symbol
IOH VOL IFT
DC Characteristics
HIGH Level Output Current LOW Level Output Current Input Threshold Current
Test Conditions
VCC = 5.5V, VO = 5.5V, IF = 250A, VE = 2.0V(2) VCC = 5.5V, IF = 5mA, VE = 2.0V, ICL = 13mA(2) VCC = 5.5V, VO = 0.6V, VE = 2.0V, IOL = 13mA
Min.
Typ.*
Max.
100
Unit
A V mA
0.4 3
0.6 5
Isolation Characteristics (TA = -40C to +85C unless otherwise specified.) Symbol
II-O
Characteristics
Input-Output Insulation Leakage Current Withstand Insulation Test Voltage Resistance (Input to Output) Capacitance (Input to Output)
Test Conditions
Relative humidity = 45%, TA = 25C, t = 5s, VI-O = 3000 VDC(12) RH < 50%, TA = 25C, II-O 10A, t = 1 min.(12) VI-O = 500V(12) f= 1MHz(12)
Min.
Typ.*
Max.
1.0*
Unit
A
VISO RI-O CI-O
5000 1011 1
VRMS pF
*All Typicals at VCC = 5V, TA = 25C
Notes:
1. The VCC supply to each optoisolator must be bypassed by a 0.1F capacitor or larger. This can be either a ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package VCC and GND pins of each device. 2. Each channel. 3. Enable Input - No pull up resistor required as the device has an internal pull up resistor. 4. tPLH - Propagation delay is measured from the 3.75mA level on the HIGH to LOW transition of the input current pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse. 5. tPHL - Propagation delay is measured from the 3.75mA level on the LOW to HIGH transition of the input current pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse. 6. tr - Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse. 7. tf - Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse. 8. tELH - Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input voltage pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse. 9. tEHL - Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input voltage pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse. 10. CMH - The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the HIGH state (i.e., VOUT > 2.0V). Measured in volts per microsecond (V/s). 11. CML - The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the LOW output state (i.e., VOUT < 0.8V). Measured in volts per microsecond (V/s). 12. Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together, and Pins 5, 6, 7 and 8 shorted together.
(c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL2601M, HCPL2611M, HCPL2630M, HCPL2631M Rev. 1.0.3
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Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M (Preliminary) -- High Speed 10MBit/s Logic Gate Optocouplers
Typical Performance Curves
Fig. 1 Low Level Output Voltage vs. Ambient Temperature
0.8
IF = 5mA VE = 2V VCC = 5.5V
Fig. 2 Input Diode Forward Voltage vs. Forward Current
VOL - LOW LEVEL OUTPUT VOLTAGE (V)
0.7 0.6
IOL = 12.8mA
IF - FORWARD CURRENT (mA)
10
0.5
IOL = 16mA
1
0.4 0.3
IOL = 9.6mA IOL = 6.4mA
0.100
0.2 0.1 0.0 -40
0.010
-20
0
20
40
60
80
100
0.001 0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
TA - AMBIENT TEMPERATURE (C)
VF - FORWARD VOLTAGE (V)
Fig. 3 Switching Time vs. Forward Current
120 50
VCC = 5V TA = 25C
Fig. 4 Low Level Output vs. Ambient Temperature
TP - PROPAGATION DELAY (ns)
100
IOL - LOW LEVEL OUTPUT CURRENT (mA)
45
IF = 15mA
80
RL = 4k (tPLH)
40
IF = 10mA
60
RL = 1k (tPLH)
RL = 350 (tPLH)
35
IF = 5mA
40
RL = 4k (tPHL) RL = 1k (tPHL) RL = 350 (tPHL)
30
VCC = 5V VE = 2V VOL = 0.6V
20
25
0 5 7 9 11 13 15
20 -40
-20
0
20
40
60
80
100
IF - FORWARD CURRENT (mA)
TA - AMBIENT TEMPERATURE (C)
Fig. 5 Input Threshold Current vs. Ambient Temperature
4.0
IFT - INPUT THRESHOLD CURRENT (mA)
VCC = 5V VE = 2V VOL = 0.6V
Fig. 6 Output Voltage vs. Input Forward Current
6
3.5
5
3.0
RL = 350
VO - OUTPUT VOLTAGE (V)
4
RL = 1k
2.5
RL = 1k
3
RL = 350
2.0
RL = 4k
2
RL = 4k
1.5
1
1.0 -40
-20
0
20
40
60
80
100
0
0
1
2
3
4
5
6
TA - AMBIENT TEMPERATURE (C)
IF - FORWARD CURRENT (mA)
(c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL2601M, HCPL2611M, HCPL2630M, HCPL2631M Rev. 1.0.3
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Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M (Preliminary) -- High Speed 10MBit/s Logic Gate Optocouplers
Typical Performance Curves (Continued)
Fig. 7 Pulse Width Distortion vs. Temperature
60 500
IF = 7.5mA VCC = 5V IF = 7.5mA VCC = 5V RL = 4k (tR)
Fig. 8 Rise and Fall Time vs. Temperature
PWD - PULSE WIDTH DISTORTION (ns)
40
RL = 4k
tR / tF - RISE AND FALL TIME (ns)
50
400
300
30 20 10 0 -10 -40
200
100
RL = 1k (tR) RL = 350 (tR)
RL = 1k
0
RL = 4k (tF) RL = 1k (tF) RL = 350 (tF)
RL = 350
-20
0
20
40
60
80
100
-100 -40
-20
0
20
40
60
80
100
TA - AMBIENT TEMPERATURE (C)
TA - AMBIENT TEMPERATURE (C)
Fig. 9 Enable Propagation Delay vs. Temperature
TE - ENABLE PROPAGATION DELAY (ns)
100
IF = 7.5mA VCC = 5V
Fig. 10 Switching Time vs. Temperature
100 90
IF = 7.5mA VCC = 5V RL = 4k (tPLH)
TP - PROPAGATION DELAY (ns)
80
RL = 4k (tELH)
80 70 60
RL = 1k (tPLH)
60
40
RL = 1k (tELH)
50
RL = 350 (tPLH)
20
RL = 350 (tELH) RL = 4k/1k/350 (tEHL)
40 30 20 -40
RL = 4k (tPHL) RL = 1k (tPHL) RL = 350 (tPHL)
0 -40
-20
0
20
40
60
80
100
-20
0
20
40
60
80
100
TA - AMBIENT TEMPERATURE (C)
TA - AMBIENT TEMPERATURE (C)
Fig. 11 High Level Output Current vs. Temperature
1.6
IOH - HIGH LEVEL OUTPUT CURRENT (A)
1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 -40
VCC = 5V VO = 5.5V VE = 2V IF = 250A
-20
0
20
40
60
80
100
TA - AMBIENT TEMPERATURE (C)
(c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL2601M, HCPL2611M, HCPL2630M, HCPL2631M Rev. 1.0.3
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Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M (Preliminary) -- High Speed 10MBit/s Logic Gate Optocouplers
Test Circuits
Pulse Generator tr = 5ns Z O = 50
+5V
IF = 7.5 mA VCC
1 2
Input Monitor (I F) 47
8 7 6
CL .1 f bypass RL Output (VO )
Input (IF ) t PHL Output (VO ) tPLH
IF = 3.75 mA
1.5 V 90% 10% tf tr
3 4
Output (VO )
GND
5
Fig. 12 Test Circuit and Waveforms for tPLH, tPHL, tr and tf
Pulse Generator tr = 5ns Z O = 50
Input Monitor (V E) +5V
3.0 V VCC
1
7.5 mA
8 7 6
CL .1 f bypass RL Output (VO )
Input (VE ) t EHL t ELH
1.5 V
2 3 4
Output (VO ) 1.5 V
GND
5
Fig. 13 Test Circuit tEHL and tELH
(c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL2601M, HCPL2611M, HCPL2630M, HCPL2631M Rev. 1.0.3
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Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M (Preliminary) -- High Speed 10MBit/s Logic Gate Optocouplers
Test Circuits (Continued)
VCC
1
IF A B VFF
8 7 6 5
.1 f bypass
+5V
2 3 4
350 Output (VO)
GND
VCM Pulse Gen
Peak VCM 0V
5V Switching Pos. (A), IF = 0 VO VO (Min)
CM H
VO (Max) VO 0.5 V Switching Pos. (B), I F = 7.5 mA CM L
Fig. 14 Test Circuit Common Mode Transient Immunity
(c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL2601M, HCPL2611M, HCPL2630M, HCPL2631M Rev. 1.0.3
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Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M (Preliminary) -- High Speed 10MBit/s Logic Gate Optocouplers
Package Dimensions
Through Hole
PIN 1 ID.
4 3 2 1
4 3 2 1
0.4" Lead Spacing (Option TV) (Pending)
PIN 1 ID.
0.270 (6.86) 0.250 (6.35)
5 6 7 8
0.270 (6.86) 0.250 (6.35)
0.390 (9.91) 0.370 (9.40)
5
6
7
8
SEATING PLANE
0.070 (1.78) 0.045 (1.14) 0.200 (5.08) MAX
0.156 (3.94) 0.144 (3.68)
SEATING PLANE
0.020 (0.51) MIN
0.390 (9.91) 0.370 (9.40) 0.156 (3.94) 0.070 (1.78) 0.144 (3.68) 0.045 (1.14) 0.020 (0.51) MIN
0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP 0.016 (0.40) 0.008 (0.20) 15 MAX 0.300 (7.62) TYP
0.200 (5.08) MAX
0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP 0.031 (0.78) 0.016 (0.40) 0.008 (0.20) 0 to 15 0.400 (10.16) TYP
Surface Mount - 0.3" Lead Spacing (Option S)
0.390 (9.91) 0.370 (9.40)
4 3 2 1
8-Pin Surface Mount DIP - Land Pattern (Option S)
0.070 (1.78)
PIN 1 ID.
0.270 (6.86) 0.250 (6.35)
0.060 (1.52)
5
6
7
8
0.100 (2.54) 0.295 (7.49) 0.415 (10.54) 0.030 (0.76)
0.156 (3.94) 0.144 (3.68)
0.070 (1.78) 0.045 (1.14) 0.020 (0.51) MIN
0.300 (7.62) TYP 0.016 (0.40) 0.008 (0.20)
0.200 (5.08) MAX
0.022 (0.56) 0.016 (0.41) 0.100 (2.54) TYP
0.015 (0.40) MIN Both Sides
0.315 (8.00) MIN 0.405 (10.30) MAX.
Note: All dimensions are in inches (millimeters)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/
(c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL2601M, HCPL2611M, HCPL2630M, HCPL2631M Rev. 1.0.3
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Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M (Preliminary) -- High Speed 10MBit/s Logic Gate Optocouplers
Ordering Information
Option
No Suffix S SD V TV SV SDV
Example Part Number
6N137M 6N137SM 6N137SDM 6N137VM 6N137TVM 6N137SVM 6N137SDVM Surface Mount Lead Bend
Description
Standard Through Hole Device, 50 pcs per tube Surface Mount; Tape and Reel IEC60747-5-2 approval pending (VDE) IEC60747-5-2 approval pending (VDE), 0.4" lead spacing IEC60747-5-2 approval pending (VDE), surface mount IEC60747-5-2 approval pending (VDE), surface mount, tape and reel
Marking Information
1
6N137 V
3 4
2 6
XX YY
5
B
Definitions
1 2 3 4 5 6 Note:
`HCPL' devices are marked only with the numerical characters (for example, HCPL2630 is marked as `2630'). The `M' suffix on the part number is an order identifier only. It is used to identify orders for the white package version. The `M' does not appear on the device's top mark.
Fairchild logo Device number VDE mark (Note: Only appears on parts ordered with VDE option - See order entry table) (pending approval) Two digit year code, e.g., `07' Two digit work week ranging from `01' to `53' Assembly package code
(c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL2601M, HCPL2611M, HCPL2630M, HCPL2631M Rev. 1.0.3
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Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M (Preliminary) -- High Speed 10MBit/s Logic Gate Optocouplers
Carrier Tape Specifications (Option SD)
D0 K0
t
P0
P2
E
A0 W1 B0
F W
d
User Direction of Feed
P
D1
Symbol
W t P0 D0 E F P2 P A0 B0 K0 W1 d R Pocket Pitch Tape Width
Description
Tape Thickness Sprocket Hole Pitch Sprocket Hole Diameter Sprocket Hole Location Pocket Location
Dimension in mm
16.0 0.3 0.30 0.05 4.0 0.1 1.55 0.05 1.75 0.10 7.5 0.1 2.0 0.1 12.0 0.1 10.30 0.20 10.30 0.20 4.90 0.20
Pocket Dimensions
Cover Tape Width Cover Tape Thickness Max. Component Rotation or Tilt Min. Bending Radius
13.2 0.2 0.1 max 10 30
(c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL2601M, HCPL2611M, HCPL2630M, HCPL2631M Rev. 1.0.3
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Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M (Preliminary) -- High Speed 10MBit/s Logic Gate Optocouplers
Reflow Profile
260 240 TL 220 200 180 160 140 120 100 80 60 40 20 0 TP
Max. Ramp-up Rate = 3C/S Max. Ramp-down Rate = 6C/S
tP Tsmax Preheat Area Tsmin ts tL
Temperature (C)
120 Time 25C to Peak
240
360
Time (seconds)
Profile Freature
Temperature Min. (Tsmin) Temperature Max. (Tsmax) Time (tS) from (Tsmin to Tsmax) Ramp-up Rate (tL to tP) Liquidous Temperature (TL) Time (tL) Maintained Above (TL) Peak Body Package Temperature Time (tP) within 5C of 260C Ramp-down Rate (TP to TL) Time 25C to Peak Temperature
Pb-Free Assembly Profile
150C 200C 60-120 seconds 3C/second max. 217C 60-150 seconds 260C +0C / -5C 30 seconds 6C/second max. 8 minutes max.
(c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL2601M, HCPL2611M, HCPL2630M, HCPL2631M Rev. 1.0.3
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Single-Channel: 6N137M, HCPL2601M, HCPL2611M Dual-Channel: HCPL2630M, HCPL2631M (Preliminary) -- High Speed 10MBit/s Logic Gate Optocouplers
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PDP SPMTM Power-SPM
UHC Ultra FRFET UniFET VCX VisualMax XSTM
(R)
* Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
ANTI-COUNTERFEITING POLICY Fairchild Semiconductor Corporation's Anti-Counterfeiting Policy. Fairchild's Anti-Counterfeiting Policy is also stated on our external website, www.fairchildsemi.com, under Sales Support. Counterfeiting of semiconductor parts is a growing problem in the industry. All manufacturers of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed applications, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild's quality standards for handling and storage and provide access to Fairchild's full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address any warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Preliminary No Identification Needed Obsolete Product Status Formative / In Design First Production Full Production Not In Production Definition Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only.
Rev. I47
(c)2009 Fairchild Semiconductor Corporation 6N137M, HCPL2601M, HCPL2611M, HCPL2630M, HCPL2631M Rev. 1.0.3
www.fairchildsemi.com 13

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